Wafer level packaging (WLP) pushes interconnect density and form factor to their limits, but it also pushes metrology to its limits. Inspection of bump height, redistribution layer (RDL) step heights, passivation thickness, and die edge integrity demands measurements across surfaces of wildly varying reflectivity — bare silicon, copper, gold, polymer dielectrics — often within the same field of view and with no opportunity to optimize illumination conditions for each material separately.
Conventional white light interferometry struggles here. The dynamic range mismatch between a specular metal bump and an adjacent low-reflectivity polymer surface forces compromises in illumination and detection that degrade measurement fidelity on one surface or the other. In practice this means multiple measurement passes, parameter adjustments between regions, or accepting degraded data at material boundaries — none of which are acceptable at production throughput.
lineWLI eliminates this constraint. By decoupling surface reflectivity from height retrieval, it delivers accurate topography across the full reflectivity gamut of a WLP surface in a single pass. Specular metal bumps and matte polymer dielectrics are measured simultaneously, correctly, and without compromise. Step heights are recovered accurately at material boundaries where conventional systems produce artefacts or dropouts.
VSON packages and other leadless packages are superseding packages with leads as as they offer good thermal performance at a smaller footprint than packaged with leads. They are produced by attaching a singulated die to a pre-plated copper lead frame, encapsulating the assembly in epoxy mold compound under heat and pressure, and then singulating individual devices from the panel by saw dicing through the lead frame tabs and mold compound simultaneously. A good electrical connection requires co-planarity of all pads, no excess recess of the pads compared to their surrounding epoxy mold compound (EMC), nor proud burrs left over from the singulation process and finally no residue from the molding process on the pad (mold flash).
This microscope image shows the underside of a VSON-14 package. The central pad is for connecting GND and thermal power dissipation. Pin number 1 is the pin the top left corner and the thermal pad defines the reference plane.
Pad recess height is a critical dimension. LineWLI one line profile in one shot and can quickly capture step heights. For this device, the recess has a height of about 2 µm. LineWLI works on the dark mold compound just as well as on the highly reflective metal surface. The numbers and lines indicate the location of the subsequent profile measurements. The system could not detect mold flash on the surface of the pads.
The surface roughness is: mold compound: Ra = 70 nm, Rz = 500 nm, pads: Ra=160nm and Rz = 1400 nm
After molding, the singulation process cuts through the lead frame. However, it must not leave proud burrs. LineWLI reveals that the cutting tool left receeding burrs.
